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Job Location | Noida |
Education | Not Mentioned |
Salary | Not Disclosed |
Industry | Consumer Durables / Electronics |
Functional Area | General / Other Software |
EmploymentType | Full-time |
Skill Set:Proficiency with Linux, Perl and TCL is requiredGood problem solving and debugging skillsGood communication skills and knowledge of customer interaction.Experience : 3 to 8 YearsKnowledge in fault modeling Stuck - at, Transition, Path Delay, Gate - Exhaustive, IDDQ, and other advanced DFT modelsKnowledge in JTAG, MBIST, Scan Compression, ATPG, Fault Simulation and at - speed testingExperience with industry ATPG tools Synopsys TetraMAX, Cadence Encounter Test or Mentor Fast Scan ATPG tools Synopsys DFTC scan insertionExperience with industry simulation tools such as VCS, ModelSim, NC Verilog etc.,Direct experience in silicon bring - up, debug, and validation of DFT features on ATEWrite tools and scripts in Perl and other scripting languages to enhance the DFT process.,
Keyskills :
atpgdftscansiliconproblem solvingcommercial modelscadence encountercommunication skillstclvcsperljtaglinuxverilogcadencescriptsmodelsimfeaturestetramax