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DSP STA/ Synthesis/UPF/LEC/CLP

10.00 to 12.00 Years   Noida   23 Sep, 2019
Job LocationNoida
EducationNot Mentioned
SalaryNot Disclosed
IndustryIT - Software
Functional AreaGeneral / Other Software
EmploymentTypeFull-time

Job Description

#NAME Minimum Qualifications 10 12 years experience in Digital ASIC / Processor Design with a leading chipset company Strong fundamentals in core areas: Computer Architecture, Computer Arithmetic, Digital Signal Processing, Circuit Design, Process Technology Strong Experience required in : Synthesis for High speed and Low Power / Low Area, UPF, DCG, Formal Verification, CLP, PTSI and PTPX Strong Background required in one or more among: Circuit Design, Standard Cell Libraries, Compiler and Custom Memories, Physical Design Strong communication skills to work with design teams worldwide,

Keyskills :
digitalsignalprocessing strongcommunicationskills standardcell circuitdesign physicaldesign signalprocessing computerarithmetic communicationskills computerarchitecture clp upf asic cell malverification

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