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Job Location | Noida |
Education | Not Mentioned |
Salary | Not Disclosed |
Industry | Manufacturing |
Functional Area | General / Other Software |
EmploymentType | Full-time |
NXP SemiconductorsN.V. (NASDAQ: NXPI) enables secure connections for a smarter world, advancing solutions that make lives easier, better, and safer. As the world leader in secure connectivity solutions for embedded applications, NXP is driving innovation in the automotive, industrial & IoT, mobile, and communication infrastructure markets. Built on more than 60 years of combined experience and expertise, the company has approximately 29,000 employees in more than 30 countries and posted revenue of $8.61 billion in 2020.Job is in MSIP- Mixed Signal IP team that delivers the critical Analog design IPs in Clocking, Data Converters area integrated with DA design wrappers that help in smooth integration of MSIPs into SOCs based in Automotive, Edge Processing, Microcontroller/Microprocessor based products.Responsibilities include but not limited to Develop DA(Digital) Controller/Wrapper design for Analog IPs for Clocking IP ( Crystal Oscillator, PLL, DPLL, IRC) or Data ConverterWork closely with System Design or SOC Architects to jointly develop the specifications of the design, develop appropriate design architecture and implement the design. Also create/work with Verification engineer to develop verification plan to find design bugs/issues in Architecture/design in terms of functional verification, robustness checks with latest verification methodologies UPF etcSet Functional/Performance specifications of DA IP to achieve quality targets with System/SOC teams Create design test-modes & DFT strategy for analog MSIPs. Support SOC Frontend & verification engineers for successful SOC integration of IPs Participate regular peer to peer reviews and design reviewsJob Skills/Experience required:Around 5 years hands-on experience in Analog MSIP design. Working experience in digital design interface/wrappers for Phase Locked Loops (PLL), Crystal Oscillators (XOSC), bias generators, reference circuits, Low Drop-Out regulators (LDO), IRCs, high speed/general IOs, Data converters etc Have exposure in ultra-low power design techniques (multi supply domain, power gating, clock gating) Have know-how in interfaces to other domains (supply/power domain crossing) such as level shifter, isolation, analog test-bus etc.
Keyskills :
verificationuvmdesignfailure analysisfront endrtl codingmixed signalpeer reviewsanalog designsystem designsystem verilogdigital designworking experienceknowledge discoveryconnectivity solutions