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R&D Engineer, Sr I

3.00 to 7.00 Years   Noida   20 Jul, 2022
Integrated Personnel Services Limited
Job LocationNoida
EducationNot Mentioned
SalaryNot Disclosed
IndustryManagement Consulting / Strategy
Functional AreaBio Tech / R&D / Scientist
EmploymentTypeFull-time

Job Description

    R&D Engineer, Sr I3 - 7 yearsNoidaThe Embedded Memory and Logic Team in Noida is part of Solutions Group and is responsible for standard and custom embedded SRAMs /ROMs development and provides both functional and physical views of memory in form of Memory compilers, A semiconductor intellectual property (IP) for the design of complex integrated circuits .The team is completely responsible for all aspects of memory development starting from Bit Cell Analysis, Architecture Design, Characterization and Verification.Responsibilities:Develop Multiport SRAM/Register file architectures and circuit implementation techniques.Schematic entry, simulation of major blocks, layout planning, layout supervision and interface with CAD team for full verification and model generation.Designing and implementing optimum low-power and area-efficient embedded memory (SRAM, register files, etc.) circuits and architectures.Learn and apply skills in memory compilers having Transistor level circuit Design.Resolves a wide range of issues in creative waysInter-team interactioncustomer focusFrequently networks with senior internal and external personnel in own area of expertiseExperience of FinFet Technology for Memory DesignCan coordinate, facilitate and monitor the daily activities of a small to large group of support resources within their section or project teamWhile holding a leadership role is able to control to the memory development at a prominent levelWith minimal supervision, prioritizes workload to successfully manage multiple tasks and responsibilitiesProactively addresses and communicates issues impacting productivityIn this role, the Senior Engineer will be part of team contributing to Different type of Architectures of embedded SRAM, Register files and ROM.As senior Engineer, the individual will be involved in challenging projects and drive it to completion in record time. You will quickly ramp on the existing flow, understand the challenges, and produce the work plan.Your expertise in deep submicron technology and Finfet, SRAM design , processor design , Digital design flow and teamwork skills will be highly leveraged to guide activity across the entire cross-discipline, multi-site team.You will work with others to identify the issues, get buy-in on proposed solutions, and implement the solutions in time for the team to execute to schedule.Skills/Experience:BE/B.Tech/ME/M.Tech/MS in Electrical Electronics Engineering from premium institute/university with minimum of 5 years of experience in VLSI DesignDeep understanding of SRAM/Register File architectures and advanced custom circuit implementations.Exposure to full embedded memory design flow: Architecture, circuit design, physical implementation, compiler automation, characterization, timing and model generation.Direct experience with the most advanced technology nodes. Familiarity with variation-aware design in nanometre technology nodesW mastery in scripting using Perl, python for automationDeep understanding of SRAM single port and multi-port design. Fundamentals:Understanding of RC circuit of 1 st and 2 nd order.Basics of Digital design (realization of Boolean function using Gates, Mux etc)Fundamentals of Transfer function and its analysis for stability etc.Strong CMOS fundamentalsKnowledge of CMOS fabricationGood digital design knowledge

Keyskills :
automationsimulationfabricationdigital designcadcircuit designingperlpython

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