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R&D SW Engineer Velsyn compile SISWMG

3.00 to 6.00 Years   Noida   25 May, 2020
Mentor Graphics India Pvt Ltd
Job LocationNoida
EducationNot Mentioned
SalaryNot Disclosed
IndustryIT - Software
Functional AreaGeneral / Other Software
EmploymentTypeFull-time

Job Description

Velsyn compile team is working on the core platform compile for hardware assisted function verification. This is a complex software dealing with varying concepts based on Graph Algorithms, Compiler optimizations, Logic Synthesis, Timing Analysis, Logic Partitioning etc.ResponsibilitiesAs a member of the team, one will be working primarily on C++ and will be responsible for the design and development of various pieces of the overall compiler.Job Qualification:Should have -

  • More than 3 years of experience in software development
  • Good knowledge of C++, algorithm and data structures
  • Good problem solving and analytical skills
  • The person should be self-motivated and can work independently.
  • Should be able to guide others, towards project completion.
Good to have
  • Knowledge of Verilog, System Verilog, VHDL.
  • Understanding of gate level digital logic design.
  • Experience in parallel algorithms, job distribution.
  • Knowledge of scripting languages (PERL, Python or Groovy) would be useful.
  • Experience in compiler/simulator development.
Job Qualifications:
  • B.Tech or M.Tech in CSE/EE/ECE from a reputed engineering college
  • Exp - 3-6 years
#LI-MGRPOrganization: Digital IndustriesCompany: Mentor Graphics (India) Private LimitedExperience Level: Experienced ProfessionalJob Type: Full-time,

Keyskills :
globalhealth systemverilog timinganalysis python design timing crisis verilog hardware software analysis graphics scripting synthesis entorgraphics logicsynthesisc

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