Lead Physical Design Engineer

Job Description

As a leading Engineering and technology solutions company, Cyient s Semiconductor business unit is a key contributor to our success. With several blue-chip customers across the world, we are proud to work on cutting edge technology, shortening development lead times, improving performance, and enabling the technology of tomorrow.Cyient brings more than 20 years of experience in semiconductor and software systems solutions and services. We offer a complete capability across the semiconductor value chain, from design services to custom turnkey ASIC solutions. Our strong technical and domain expertise with a robust partnership ecosystem makes us a trusted global semiconductor partner, giving our engineers the opportunity to work on cutting edge projects, to make a difference and to develop themselves.Why work for Cyient:Our Semiconductor team works on cutting edge technology from AI led chip design to IOT and embedded intelligence. This is your chance to work for an innovative team and build your technical prowess. Our engineers have the opportunity to work across the product lifecycle. Are you looking to expand your skills across the value chain Our project leads recognize talent and growth aspirations, helping you expand your technical skills. Our semiconductor business serves multiple industries such as industrial, medical, and automotive. We are uniquely positioned to bring innovation from each domain for our custom ASIC solutions and semiconductor services. Cyient has locations across the world, with three main delivery centers in India Hyderabad, Pune, and Bangalore. We offer the flexibility to work in different delivery sites while working closely with our customers at the same time.Whatever your particular area of expertise, at Cyient there is opportunity for personal growth. With the breadth of customers, projects, and the sectors that we are active in there are unique and exciting career paths to explore.We are a fast growing and expanding organization and we want you to join us in our journey in designing the chips of the future!Apply today!For more information: https://www.cyient.careers/careers/get-to-know-usJob DescriptionExperience: 5 to 8 YearsJob Location: Pune.Skills required: In-depth knowledge and hands-on experience on Netlist2GDSII Implementation i.e. Floorplanning, Power Grid Design, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification, Chip finishing. Should have experience on Physical Design Methodologies and sub-micron technology of 28nm and lower technology nodes.Should be able to mentor Junior engineers with block level ac Should have experience on programming in Tcl/Tk/Perl to automate design process and improve efficiency. Must have hands-on experience on PnR Suite from Synopsys/Cadence (Innovus, ICC2) Strong experience on Static Timing Analysis (PrimeTime - SI), EM/IR-Drop analysis (PT-PX, Redhawk), Physical Verification (Calibre). Understanding the practical application of methodologies and Physical Design Tools, Flow Automation and Improvements. Experience in complex SOC integration, Low Power and High Speed Design and Advanced Physical Verification Techniques.Skills & ExperienceASIC physical design using industry Cadence or Synopsys tools, Full chip and Block level physical design implentation, Physical DesignCyient is an Equal Opportunity Employer.Cyient recruits, employs, trains, compensates, and promotes regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender, gender identity or expression, veteran status, and other protected status as required by applicable law. We are proud to be a diverse and inclusive company where our people can focus their whole self on solving problems that matter.,

Keyskills :
high speed designstatic timing analysisverificationdrcfloor planningchip designsynopsys toolsphysical designpower integrityroutingtiming analysis