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Principal Design Engineer

7.00 to 9.00 Years   Pune   09 Mar, 2021
Job LocationPune
EducationNot Mentioned
SalaryNot Disclosed
IndustryIT - Software
Functional AreaGeneral / Other Software
EmploymentTypeFull-time

Job Description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

  • This position requires the design and development of optimized Audio or Vision or Radar or ML Libraries on Tensilicas configurable embedded processors.
  • Developing and Optimizing performance of signal processing firmware using C level changes using C instrinsics.
  • Documenting the implementation for engineering details and for customers.
  • Interacting with internal customer engineering team & partners and resolving different issues.
Required Skills
  • The candidate should have a good experience in developing and optimizing DSP applications in C and assembly language for a DSP or DSP-like processor, and should have a strong grasp of the issues surrounding software performance tuning.
  • The candidate should have experience applying principles of good software and interface design (for example, abstraction and encapsulation) and should have experience with at least one revision control system.
  • Good technical communication skills is required. Candidate must be self-motivated and capable of working independently or as part of a team.
  • In-depth knowledge of either audio/speech/Image/Radar processing DSP algorithms is required.
  • Knowledge of CNN, machine learning frameworks like TensorFlow/Caffe will be added advantage
  • 9 years relevant work experience in DSP signal processing.
  • Educational qualification: BE/BS in CS or EE is required, MTech/MS is preferred.
We re doing work that matters. Help us solve what others can t.,

Keyskills :
lightingestimation3d modellingahuauditingmachine learningassembly languagesignal processingcommunication skillsoptimizing performancetechnical communicationinterface designdspradargrasp

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