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Principal Design Engineer

2.00 to 5.00 Years   Pune   25 Jan, 2023
Cadence Design
Job LocationPune
EducationNot Mentioned
SalaryNot Disclosed
IndustryIT - Software
Functional AreaGeneral / Other Software
EmploymentTypeFull-time

Job Description

    • B.Tech/BE/ME/Mtech with hands-on experience physical design , timing closure and physical verification.
    • Exp with ASIC design flow, hierarchical physical design strategies, methodologies and understand deep sub-micron technology issues.
    • Solid knowledge on physical design flow, Timing closure and physical verification. Knowledge of formal verification, EM-IR .
    • Good track records of working on complex IPs & SoCs at 16/10/7 nm
    • Power user of Cadence implementation tools, such as Genus, Innovus, Quantus,Tempus, PVS, Voltus.
    • Automation and programming-minded, coding experience in Makefile/Tcl/Tk/Perl.
    • Self-motivated, able to work independently or as a team player, excellent verbal and written communication skills.
    ,

Keyskills :
lightingestimation3d modellingahu

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