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Job Location | Pune |
Education | Not Mentioned |
Salary | Not Disclosed |
Industry | IT - Software |
Functional Area | IT Operations / EDP / MIS |
EmploymentType | Full-time |
We are working on DFT Front End. It is a frontend team which works on top of the analyzer and elaborator. As a member of the team, one will be working primarily on C++, Also, DS and will be responsible for the design and development of various pieces of the overall software.Must have2+ years of experienceGood knowledge of C++, algorithm and data structuresGood problem solving and analytical skillsThe person should be self-motivated and can work independently.Should be able to guide others, towards project completion. Good to haveKnowledge of Verilog, System Verilog, VHDL.Knowledge of flex/bison.Understanding of gate level digital logic design.Experience in parallel algorithms, job distribution.Experience in Analyzer/Compiler development. Job Qualifications:B.Tech or M.Tech in CSE/EE/ECE from a reputed engineering college.Organization: Digital IndustriesCompany: Mentor Graphics (India) Private LimitedExperience Level: Mid-level ProfessionalJob Type: Full-time,
Keyskills :
javalinuxautomationframeworkjavascriptfront endsystem verilogdata structuresproblem solvinganalytical skillsparallel algorithmsdftdesignveriloggraphicsoptimizeranalyticalmentor graphics