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| Job Location | Bangalore |
| Education | Not Mentioned |
| Salary | Not Disclosed |
| Industry | IT - Software |
| Functional Area | Network / System Administration |
| EmploymentType | Full-time |
Job ID: JR0158141Job Category: EngineeringPrimary Location: Bangalore, KA INOther Locations:Job Type: Experienced HirePre-si System Integration and Validation EngineerJob DescriptionCreates emulation/Field Programmable Gate Array (FPGA) models from a Register Transfer Level (RTL) design using emulation/FPGA synthesis, partitioning and routing tools. Defines and documents RTL changes required for emulation/FPGA. Develops hardware and software collaterals and integrates it with the emulation/FPGA model. Tests and debugs the emulation/FPGA model and collaterals. Defines and develops new capabilities & HW/SW tools to enable acceleration of RTL and improve emulation/FPGA model usability for preSilicon and postSilicon functional validation as well as SW development/validation. Develops improvements to usability by RTL validation and debugging of failing RTL tests on the emulation platform. Interfaces with and provides guidance to presilicon Validation teams for optimizing preSi validation environments, test suites and methodologies for emulation efficiency. Develops and applies automation aids, flows and scripts in support of emulation easeofuse and improvement of equipment utilization.QualificationsMust have a Bachelors degree or Masters degree in Electrical, Electronics or Computer Engineering with relevant experience of at least 4+ years Strong software skills with experience using 1 or more of the following Ianguages : System - Verilog/Verilog, Perl, C/C++, Python. Experience with emulators such as ZeBu, Palladium and/or Veloce for large scale designs Strong understanding of Computer architecture, design principles, validation methodologies and tools Experience in debugging and isolation techniques including writing checkers, monitors, assertions, verdi and necessary DPI interfaces for co-emulation environments. Prior expertise in CPU, Coherency, reset, Global Flows, Power management, memory, PCIe highly desirable Strong debug abilities, good interpersonal skills and the ability to work in a highly cooperative team environment across many time zones are also desirable. Prior experience in System Validation is a plusInside this Business GroupThe Design Engineering Group is a worldwide team responsible for the design, development, validation, and manufacturing of IPs and SOCs. Our mission is to deliver leadership products through groundbreaking innovations.Legal Disclaimer:Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at www.jobs.intel.com and not fall prey to unscrupulous elements.INExperienced HireJR0158141Bangalore,
Keyskills :
test casesSystem Integrationtest suitespower managementdesign engineeringsystem integration