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| Job Location | Bangalore |
| Education | Not Mentioned |
| Salary | Not Disclosed |
| Industry | Consumer Durables / Electronics |
| Functional Area | General / Other Software |
| EmploymentType | Full-time |
Job Area Engineering - Verification Location India - Bangalore Job Overview Qualcomms compute sub-system team work on next generation low power DSP sub-system for SoC products used in our customers smart low power devices. As a key member of the compute sub-system verification team individual will work to understand the functional requirements of the design. Candidate will work closely with the design team to deliver exciting, high-quality technology to our customers. This role involves the development of test plans, owning/driving verification environments and verify complex designs until coverage goals are achieved. The responsibility of the position involves comprehensive pre-silicon test planning, testbench development using the verification methodology such as System Verilog, UVM/OVM, assertion development, formal verification (property checking). In this role individual will be exposed to complete verification life cycle, from system-level concept to tape out and post-silicon support. Minimum Qualifications 7+ years Hardware Engineering experience or related work experience. id= hdnMinimumQualifications >Bachelors degree in Engineering, Information Systems, Computer Science, or related field.7+ years Hardware Engineering experience or related work experience. Preferred Qualifications 7-12 years experience in unit and subsystem level verification. Worked on coverage driven constraint random verification. Strong in System Verilog, UVM, Testplanning Sound experience in testbench (stimulus, agent, monitor, checker) development. Worked in the verification having c based reference model inside the testebench Exposure in scripting(perl, Python). Good team player. Need to interact with the designers and other verification engineers proactively. Prior experience with video domain is added advantage. Prior experience with gate level simulation, power aware verification, formal verification and emulation is added advantage Education Requirements Required: BE/BTech/ME/MTech/MS Electrical Engineering and/or Electronics, Vlsi from reputed university with preferably distinction Keywords,
Keyskills :
verificationuvm gate level simulationtest planning computer scienceinformation systems hardware engineeringelectrical engineerin