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Lead PCIe Verification Enigneer

5.00 to 10.00 Years   Bengaluru / Bangalore   18 Jul, 2023
Cadence Design Systems (India) Private Limited
Job LocationBengaluru / Bangalore
EducationNot Mentioned
SalaryNot Mentioned
IndustryEngineering & Design,Engineering / Procurement / Construction
Functional AreaEngineering - Electronics /Communication
EmploymentTypeFull-time

Job Description

Lead PCIe Verification EnigneerAbout the job At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

  • BE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer.
  • Strong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must.
  • Design Verification experience verifying complex designs and leading projects from concept to verification closure.
  • Strong hands-on UVM and System Verilog coding experience and functional verification environment development is required.
  • Experience working on verifying any Serial IP or Interface protocols (PCIe, CCIX, CXL, USB, Ethernet, SATA/SAS, UFS, SPI, HDMI, MIPI, I3C)
  • Formal verification and/or Emulation experience is highly desirable.
  • AMBA protocol (AXI5, CHI, CXS) experience is a desirable.
  • Familiarity with using 3rd party VIPs, Cadence preferred.
  • Team player with strong communication skills, and ability to work independently on the verification of a portion of the design.
  • Prior experience in IP development teams would be an added advantage.
Were doing work that matters. Help us solve what others cant.

Keyskills :
PciePCIe VerificationUvmSystem Verilog coding

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