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DDR PHY DV Engineer

2.00 to 6.00 Years   Noida   16 Jul, 2019
Job LocationNoida
EducationNot Mentioned
SalaryNot Disclosed
IndustryConsumer Durables / Electronics
Functional AreaGeneral / Other Software
EmploymentTypeFull-time

Job Description

You will be responsible for understanding the analog - digital partition at system level , develop testplan for functional and circuit performance verification , develop the scalable testbench using the SVTB - UVM , test case development , debugging , coverage model development , coverage closure. You will be working with analog circuit design team , digital design team , analog modeling , characterization team , SoC integration team to complete the successful core level verification , integration into SoC ,,

Keyskills :
socuvmdesigntestingsciencedebuggingengineeringintegrationtestplanninglosurecircuithardwareplanningpartitionperfmance

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