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Digital Verification Engineer M/F

6.00 to 10.00 Years   Noida   05 Jul, 2021
STMicroelectronics
Job LocationNoida
EducationNot Mentioned
SalaryNot Disclosed
IndustryManufacturing
Functional AreaEmbedded / System Software,General / Other Software
EmploymentTypeFull-time

Job Description

Responsibilities include :

  • Plan, develop and Execute Complete Design Verification of digital modules/IPs developed for highly complex SoCs/ASICs to address automotive application.
  • IP Verification, specification understanding, verification planning, writing vplans, uVM testbench development, testcase development
  • code and functional coverage measurement.SoC Verification (specs. understanding and micro-architecture definition, RTL coding,) targeted towards Automotive applications
  • tracking and managing verification matrix(testcases status, defect status) for his IP/SoC verification.
  • vmanager regression run and publish verification reports
  • Engineering and Validation support on design related issues and debugging.
, Mandatory Skills:
  • Experience in C, C++, Verilog, system Verilog
  • working experience in constrained randomized verification methodologies like eRM, uVM, uRM.
  • must have worked on SoC Verification, code and functional coverage techniques,
  • IP experience in any of the automotive dpmain IP like CAN, LINFLEX, Ethernet, FLexray, DIGRF, SENT will be preferred.
  • Knowledge of Emulation techniques on any of the platform like Veloce, Palladium will be preferred.
  • Perl/Python Scripting

Keyskills :
verificationuvmdesignfailure analysisrtl codingsoc verificationdesign verificationverification planningsocrtlwritingverilogflexrayplanningetherneterm

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