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Lead SoC Verification/Emulation Engineer

4.00 to 7.00 Years   Noida   09 Sep, 2019
Job LocationNoida
EducationNot Mentioned
SalaryNot Disclosed
IndustryManufacturing
Functional AreaSite Engineering / Project Management
EmploymentTypeFull-time

Job Description

NXP Semiconductors enables secure connections and infrastructure for a smarter world, advancing solutions that make lives easier, better and safer. As the world leader in secure connectivity solutions for embedded applications, we are driving innovation in the secure connected vehicle, end-to-end security & privacy and smart connected solutions markets.Key Responsibilities

  • Define and develop new capabilities & HW/SW tools to enable acceleration of RTL and improve emulation/FPGA model usability for pre-Silicon and post-Silicon functional validation as well as SW development/validation.
  • Ensure quality adherence during all stages of the project life cycle. Also carry out a thorough analysis of existing processes and recommend and implement the process improvements to ensure Zero Defect chips
  • Ability to think differently, encouraging and influencing technological innovations in the team
  • Ability to work well as part of a team both locally, and also with remote or multi-site teams
Key Skills
  • Self-starter with 4-7 years of experience on SOC/Chip level/Cluster/IP Emulation on multimillion Gate and complex Design with multiple clocks and power domains with minimal supervision
  • Experience in microcontroller architecture, Cores ARM A/M series, Interconnect(NIC, FlexNoC), Cache Coherency, Protocols like AHB/AMBA,AXI, ACE, OCP, Memory(Flash, SRAM,DDR3/4) and memory controllers
  • Experience in automotive protocols like LIN, CAN, Flex, Graphics/Multimedia/Networking protocols like PCIe, MIPI, GPU, H.264, Ethernet, USB, ITU T.656, DSP, Image/RADAR processing would be an advantage
  • Emulation model creation from RTL/Netlist.
  • Develop hardware collateral to be integrated with the Palladium/Zebu/FPGA emulation model.
  • Create and execute Test plans targeting Sub-systems and SoC level.
  • System level performance analysis, bandwidth, latency across interconnect.
  • Experience with Speed Bridge Integration and perform real time testing.
  • Experience in integrating Acceleration VIPs and perform co-emulation.
  • Experience in Palladium or Zebu Platforms
  • Scripting and Automation to continuously improve operational efficiency
,

Keyskills :
cachecoherency qualityadherence connectivitysolutions dsp arm soc rtl usb ocp ace axi lin itu flex pcie mipi sram cache h264 erf manceanalysis

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