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Principal Application Engineer

5.00 to 0.00 Years   Noida   11 Oct, 2021
Cadence Design
Job LocationNoida
EducationNot Mentioned
SalaryNot Disclosed
IndustryIT - Software
Functional AreaEngineering Design / Construction
EmploymentTypeFull-time

Job Description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.Design and Verification Application Engineer (5 Years) (Bangalore / Noida)Greetings!At Cadence, we hire and develop leaders and innovators who want to make an impact on the world.Looking for passionate Design and Verification Application Engineer. If, interested kindly send your CV along with Current CTC & Notice period.Brief of JD is as mentioned below.Also, PLEASE SEND YOUR UPDATED PROFILE TO kmadhupcadence.com WHILE APPLYING FOR THE JOB Work location: Bangalore / Noida ( Pl let me know your preference )Application Engineer Role Description:The position is high level technical position with the Global Customer s that leverages expert level technical skills.The Support Application Engineer will often take on a number of leadership and department level duties including but not limited to: Development of Knowledge Content for Customers and AEs, interface with R&D teams, team technical development, department level operational/logistical planning, and technical supervisory responsibilities.Highlights of this role.YOU WILL BE A PART OF EXTENDED DESIGN TEAM.YOU WILL BE A PART OF DESIGN TEAM FOCUS ON ISSUE BASED SUPPORTOFF LATE CANDIDATES FROM DESIGN HOUSES JOINIED AFTET KNOWING THE DYNAMISM OF THE ROLE.YOU WILL WITNESS EXTENDED DESIGN FLOW EXPERTISEYOU WILL WITNESS MOST COMPLEX TECHNICAL PROBLEM SOLVING THRIOUG DIAGNOSIS AND RESOULUTIONSJD

  • Hands on experience in relevant domain
  • Good understanding of ASIC logic verification concepts and techniques.
  • Ability to architect complex module / sub system / Full chip test benches and build verification infrastructure.
  • Very good knowledge of Verilog/System Verilog and UVM.
  • Candidate should have worked on ARM micro controller based Single core/Multi core CPU Subsystems or associated component IP.
  • Prior hands on experience on IPs with ARM CM0/CM0_/CM3/CM4/CM7/CM33/CM55, Socrates/NIC, Debug & Test Architectures is preferred.
  • Exposure to deployment of automation and formal verification methodologies is a plus
RegardsK Madhu Prasad (Madhu Reddy)Hiring Teamkmadhupcadence.comWe re doing work that matters. Help us solve what others can t.,

Keyskills :
plcautomationscadasalesprogrammingdesign flowproblem solvingformal verificationarmcpuaesctcdesignverilogplanningipsasiccadence

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