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Job Location | Noida |
Education | Not Mentioned |
Salary | Not Disclosed |
Industry | IT - Software |
Functional Area | General / Other Software |
EmploymentType | Full-time |
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.Verification Product Validation (SV UVM) (2 Years) (Noida)Greetings!At Cadence, we hire and develop leaders and innovators who want to make an impact on the world.Looking for passionate Verification Product Validation (SV UVM). If, interested kindly send your CV along with Current CTC & Notice period.Work location: NoidaVerification Product Validation:Skills in ASIC / FPGA verification (directed test or SystemVerilog / UVM)Advanced knowledge in design techniques Verilog/SystemVerilog or VHDLA good knowledge of simulation/formal flowStrong basis in scripting Python, Perl, Bash Added benefits will be C/C programmingB.E./B.Tech./M.E./M.Tech. degree with relevant experience.Good working knowledge of various verification conceptsStrong in building Verification environments based on UVM, System VerilogStrong analytical and problem-solving skills with an ability to visualize processes and outcomes.Customer orientation and knowledge of the EDA tool flow.RegardsK Madhu Prasad (Madhu Reddy)Hiring Teamkmadhupcadence.comWe re doing work that matters. Help us solve what others can t.,
Keyskills :
validationdebuggingtest casescustomer relationsproblem solvingproduct validationedauvmctcperlfpgabashpythondesignbenefitsintelasiccadence