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Job Location | Noida |
Education | Not Mentioned |
Salary | Not Disclosed |
Industry | IT - Hardware / Networking |
Functional Area | General / Other SoftwareNetwork / System Administration |
EmploymentType | Full-time |
You will be part of a team responsible for the complete Physical Design . Tasks involved can be one or more of the following: Work with the RTL design team on understanding design in context of physical design timing closure including development of timing constraints required for implementation. Work with the DFT team on understanding DFT design in regards to physical design timing closure. Work with P&R lead on timing closure activities. Generate ECOs (both automated and manual) to fix allBachelors degree in Engineering, Information Systems, Computer Science, or related field. 2 years Hardware Engineering experience or related work experience.,
Keyskills :
rtldesign timingclosure physicaldesign computerscience hardwareengineering dft rtl pr ecos design timing closure science context hardware engineering RTLCoding NCSim AMBAAHB nf mationsystems