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| Job Location | Bangalore |
| Education | Not Mentioned |
| Salary | Not Disclosed |
| Industry | IT - Software |
| Functional Area | General / Other Software |
| EmploymentType | Full-time |
Requirements : RTL-USB PHY Experiencea) For USB, we are looking at USB Phy expertise and someone with mastery in USB protocol. More- from a design perspective, rather than DV.b) RTL Design :- Hands-on in Verilog/ VHDL- Hands-on in Perl/ Unix scripting- Hands-on in SoC level RTL integration- Hands-on in Clock Domain Crossing (CDC) checks, Linting, equivalence checks- Experience in Digital module micro-architecture and design- Experience in basic RTL simulation- IP generation enhancement kind of work- Good knowledge of Synthesis, STA and DFT aware design.- Good knowledge of ARM subsystem, I2C protocol, AMBA bus- Understanding of Power Domains and low power design techniques- Familiar with DSP subsystems and high speed interfaces(e.g. SERDES, GigE, 10GE)- - Ability to lead & motivate a team of Engineers,
Keyskills :
verificationuvmdesignfailure analysisrtl designdspphyarmdftsocrtlstausbi2cunixambabasicserdeschecks