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Job Location | Bangalore |
Education | Not Mentioned |
Salary | Not Disclosed |
Industry | IT - Software |
Functional Area | Network / System Administration |
EmploymentType | Full-time |
Job ID: JR0189679Job Category: EngineeringPrimary Location: Bangalore, KA INOther Locations:Job Type: Experienced HireIP verification engineerJob DescriptionDevelops preSilicon functional validation tests to verify system will meet design requirements. Create test case and test bench using OVM/UVM methodology. Be part of the team that carries out system functional verification where the team will define verification strategies, methodology and test plan to enable effective verification. Be part of team that collaborate cross functional efforts with Design, Architecture team to achieve full coverage verification plan.Qualifications4++ years of experience with ASIC Design and/or Verification. Familiar with System Verilog, UVM and good programming skills in scripting perl. Familiarity with coherency protocols PCIe / CXL etc. Familiarity with systemC/C++ is an added advantage. Strong verbal and written communication skills and the ability to work with a team spread across different geography sites. Flexible in dynamic execution environment.Inside this Business GroupIP Engineering Groups (IPG) vision Build IPs that power Intels leadership products and power our customers silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intels silicon design process. IPGs guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.Legal Disclaimer:Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at www.jobs.intel.com and not fall prey to unscrupulous elements.INExperienced HireJR0189679BangaloreIP Engineering Group (IPG),
Keyskills :
verificationuvmdesignfailure analysisasic designsystem verilogbehavioral trainingcommunication skillswritten communicationfunctional verificationpcietestscolorverilogsiliconbusinessipsasicintel