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Job Location | Bangalore |
Education | Not Mentioned |
Salary | Not Disclosed |
Industry | Consumer Durables / Electronics |
Functional Area | General / Other Software |
EmploymentType | Full-time |
The role : As part of our ongoing expansion, EnSilica India need to strengthen our verification team. We are looking for bright candidates who have an enthusiasm and aptitude for working in this vital part of our business. With 5- 8 years experience in industry you will relish the opportunity of working on a diverse range of projects that will both challenge and develop your verification skills. You will have a good understanding of the key concepts behind advanced verification with experience of writing SystemVerilog and using UVM. You will be comfortable with constrained random verification methodologies, code coverage analysis and running regression tests and understand the importance of monitoring key metrics to assess progress and predict the end- point for the verification process. Faced with a new project, you will have the ability to work within a team to help deliver a robust and high quality solution. Ideally you will be familiar with Synopsys VCS & Mentor Questa tools. The key responsibilities and experience are summarized below : Key tasks / responsibilities : Verification specialist working on customer and internal projects Provide high- class verification support to a wide range of projects using a range of advanced verification techniques including constrained random, coverage driven, assertion- based and formal methods Active participation in the verification community to drive the introduction of new and effective techniques within our business - to help solve the verification challenges faced by our customers Close working with our customers to build a strong relationship that results in repeat business Key skills / Background : BE / ME from reputed College / University 5- 8 Years experience in industry working on a variety of verification projects Knowledge of verification methodologies particularly UVM and SystemVerilog Demonstrate experience in the implementation of verification infrastructures, test benches, models, assertions and functional tests in Verilog and SystemVerilog Familiarity with constrained random verification methodologies, code coverage analysis and running regression tests Good understanding of ARM based subsystem verification Good understanding of ARM processors (Cortex A53, A72, A15, ARM A9, R4 etc. ) Good understanding of ARM CoreSight architecture Good understanding of AMBA Bus protocols (CHI, ACE, AXI, AHB, APB) Good customer facing skills Personal skills : Excellent communication and interpersonal skills Strong and effective presentation skills, able to operate at multiple levels including senior management Self- motivated Take ownership of problems Creative problem solving Team player.,
Keyskills :
verificationuvmdesignfailure analysiscreative problem solvingkey metricscode coverageproblem solvingpersonal skillsmanagementpresentation skillsinterpersonal skillsarmbusmal methodsseni