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| Job Location | Bangalore |
| Education | Not Mentioned |
| Salary | Not Disclosed |
| Industry | IT - Software |
| Functional Area | Engineering Design / Construction |
| EmploymentType | Full-time |
We are looking for Structural Design Engineers with strong RTL2GDSii Skill. Job responsibilities include Logic Synthesis, Floorplanning, Place and Route, Timing Analysis, Convergence, IR/EM analysis, Formal verification, VC-LP, DRC/LVS clean-up and delivery of the Blocks/Cluster or Subsystem to SOC level that is essentially complete RTL2GDSii vertical execution skillQualificationsThe right candidate must have around 7+ years experience after B.S. or 5 years after Masters degree. He/Show must have owned and closed large design blocks of size 2-3Million, High performance design 1.5G frequency and should be experience very deep submicron nodes i.e. 7nm or below. She/he should be experience Synopsys Tool suite or Cadence Tool Suite such as DC, ICC2/Fusion/Innovus, Primetime or alternative, Calibre/ICV, Conformal/Formality, .etc. In addition expertise in Ansys Redhawk-SC is highly desirable. The person should have right mindset and ability to handle dynamic changes in RTL. Automation skills in TCL/Perl/Python and Design Flow understanding is a major plus. Excellent debugging skills, Team work, professionalism and communications are a must. Bachelors/Masters degree in Electronics/Computer Science required with 7+ years experienceInside this Business GroupXeon and Networking Engineering (XNE) focuses on the development and integration of XEON and Networking SOCs and critical IPs sustain Intels Xeon and 5G networking roadmap.,
Keyskills :
staad probuildingssiterccfoundationdesign flowtiming analysislogic synthesisstructural designbehavioral trainingformal verificationartificial intelligence