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| Job Location | Bangalore |
| Education | Not Mentioned |
| Salary | Not Disclosed |
| Industry | Consumer Durables / Electronics |
| Functional Area | R&D / Product DesignEmbedded / System Software |
| EmploymentType | Full-time |
Designing IC Layout of Complex Analog and Mixed Signal Designs like SerDes, PLL, DPLL, Sense Amplifier, Op- Amp, LDO, BIAS. BGR, ADC, Oscillators, Power Management ICs, GPIO/ Special IOs ESD and IO Layout Experience is Plus. Should be Experienced in DMOS, SiGe BCD and CMOS technology in nodes 250nm, 350nm, 180nm 90nm, 45nm 28nm, 16FF, and 7FF is plus Experienced in Using Industry leading EDA tools like Cadence, Calibre, RedHawk and etc. Should have experience in automation with Skill, Python and Perl Programming. Role Candidate will work on Analog mixed- signal IC Layout with responsibilities ranging from small cell layout design to Big Module IC layout Development like comparators, charge pumps, op- amps, power stages, linear regulators, ADCs and etc. Candidate will take a assignment from the Project- Lead/ Designer and should understand the requirements and finish the high quality layout in time Candidate should possess strong DRC/ LVS debugging skills. Knowledge of differnet matching techniques, floor planning, power planning, and signal integrity is a must. Candidate should possess strong DRC/ LVS debugging skills Personal skills : Excellent communication and interpersonal skills Strong and effective presentation skills, able to operate at multiple levels including senior management Take ownership of problems Designing IC Layout of Complex Analog and Mixed Signal Designs like SerDes, PLL, DPLL, Sense Amplifier, Op- Amp, LDO, BIAS. BGR, ADC, Oscillators, Power Management IC s, GPIO/ Special IO s ESD and IO Layout Experience is Plus. Should be Experienced in DMOS, SiGe BCD and CMOS technology in nodes 250nm, 350nm, 180nm 90nm, 45nm 28nm, 16FF, and 7FF is plus Experienced in Using Industry leading EDA tools like Cadence, Calibre, RedHawk and etc. Should have experience in automation with Skill, Python and Perl Programming. Candidate will work on Analog mixed- signal IC Layout with responsibilities ranging from small cell layout design to Big Module IC layout Development like comparators, charge pumps, op- amps, power stages, linear regulators, ADC s and etc. Candidate will take a assignment from the Project- Lead/ Designer and should understand the requirements and finish the high quality layout in time Candidate should possess strong DRC/ LVS debugging skills. Knowledge of differnet matching techniques, floor planning, power planning, and signal integrity is a must. Candidate should possess strong DRC/ LVS debugging skills Excellent communication and interpersonal skills Strong and effective presentation skills, able to operate at multiple levels including senior management,
Keyskills :
cadence basic control debugging design edatools iclayout mixedsignal layoutdesign planning personalskills powermanagement signalintegrity management presentationskills inte lo seni linearregulat