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Design Verification - Memory Team

2.00 to 5.00 Years   Bangalore   26 Jul, 2022
Job LocationBangalore
EducationNot Mentioned
SalaryNot Disclosed
IndustryConsumer Durables / Electronics
Functional AreaGeneral / Other Software
EmploymentTypeFull-time

Job Description

    Position SummarySOC Design Verification:Job-responsibilities: tOwning Complete SOC Level Verification of Mid & Volume Segment Exynos SOCs. tCollaborating/Owning SOC Level verification with Korea team for various SOCs based on Exynos platform Mobile (Flagship), Automotive, Custom SOCs tTeam s ownership Equivalent to 3 complete SOC ownership across all Segments. tWorking on all aspects of SOC Verification CPU-SS, BUS, Multimedia, Clock & Power, High Speed Interfaces, DDR, GPU, AI & ML accelerators. tOwning performance verification and system verification activities and working on Performance estimation & virtual prototyping activitiesGraphics Verification Engineer Job-responsibilities: tDevelop/demonstrate a solid understanding of the Graphics Pipeline. tReview architecture and micro-architecture specifications. tWork closely with Architects and Logic Designers. tDevelop Unit Level and/or Subsystem Level Test plans, Coverage Plans and Assertion Plans needed to target zero defect post-silicon quality. tDevelop scalable Test benches in System Verilog and UVM. tIntegrate C++ Reference Models into Scoreboards via System Verilog DPI. tDevelop Tests, Functional Coverage Models and System Verilog Assertions. tRoot cause regression failures by debugging Tests/Sequences, RTL and C++ Models. tMaintain higher regression efficiency via Test/Coverage Grading, Compute Farm and Disk utilization, etc. tDrive Code and Functional Coverage closure. tSupport debug of Unit RTL/Checkers at higher levels of integration such as Subsystem/Top. tSolid understanding of Computer Architecture. tKnowledge of GPU and Graphics pipelines. tUnderstanding of micro-architecture, logic design, FSMs, arithmetic datapath pipelines. tStrong functional verification experience including Test planning, Test bench Architecture, Test/Coverage Model/Assertion Development. tStrong debugging skills. tStrong programming skills with good understanding of algorithms and data structures. tSolid scripting experience. tProficient in System Verilog/UVM/OVM, OOP/C++ and Python scripting. tPast experience with GPU or Graphics Hardware Verification. tGraphics APIs (OpenGL/ES, OpenCL, DirectX, HSA) and Shading languages (GLSL, HLSL).Samsung provides Equal Employment Opportunity for all individuals regardless of race, color, religion, gender, age, national origin, marital status, sexual orientation, status as a protected veteran, genetic information, status as a qualified individual with a disability or any other characteristic protected by law. Role and Responsibilities Skills and Qualifications * Please visit Samsung membership to see Privacy Policy, which defaults according to your location. You can change Country/Language at the bottom of the page. If you are European Economic Resident, please click here .,

Keyskills :
system veriloghigh speed interfaceslogic designequal employment opportunity

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