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| Job Location | Bangalore |
| Education | Not Mentioned |
| Salary | Not Disclosed |
| Industry | Consumer Durables / Electronics |
| Functional Area | General / Other Software |
| EmploymentType | Full-time |
Digital Design EngineerESSENTIAL FUNCTIONSModule architecture and specification and helping with digital top architecture and specification.Development of RTL using Verilog/ System Verilog and doing block level testing before hand-off to verification.Synthesis of RTL and doing quality analysis of netlist clock gating, power, gate count analysis, gate level simulations, LEC.Working with verification team in helping develop and review test plan for blocks and full device.Help with bring-up related activities.REQUIREMENTSExperience in the range of 1 to 3 years.Background in mixed signal designs is a plus.,
Keyskills :
cadence statictiminganalysis asic asicdesign drc mixedsignal systemverilog digitaldesign qualityanalysis rtl ertms design testing verilog analysis synthesis architecture BiCMOS haseLockedLoop PowerManagem