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Digital Implementation & Verification Engineer

2.00 to 5.00 Years   Bangalore   30 Mar, 2020
Job LocationBangalore
EducationNot Mentioned
SalaryNot Disclosed
IndustryCement / Building Material
Functional AreaGeneral / Other Software
EmploymentTypeFull-time

Job Description

Digital Implementation & Verification Engineer (f/m)

Your tasks:

In this position you will be integrated in our Technology Enablement team,

especially in projects the Advanced Circuit Design (ACD) department , you will be driving.in close collaboration with other disciplines across our worldwide engineering teams

You will be implementing as well as verifying complex memory arrays (SRAM, eNVM) which enable the development of advanced process nodes as well as early customer prototypes.

Your responsibilities include:

- The implementation of complex memory arrays covering:

- RTL - synthesis

- Digital abstraction of custom analog building blocks

- Place & Route

- Timing sign off (STA)

- Physical sign off (LVS, DRC)

- Signal & power integrity sign off (EMIR)

- The verification of complex memory arrays covering:

- Creation of bottom - up pre/post - layout simulation environments

- Sign off simulations for functional closure

- LEC for correlation between custom and digital design paths.

- Creation of coverage metrics.

- Support of sign off and release into dedicated Technology test chips

- Support of test program development, Si bring up and mission mode test.

Your profile:

You have an engineering degree in electrical or computer engineering, physics or in semiconductors (design or technology)

  • MS/ME in Electrical Engineering is required with specialization in Circuit Design. (2 years experience)
  • Or BS/BE in Electrical Engineering is required with specialization in Circuit Design. (4 - 5 years experience)
,

Keyskills :
verification uvm design failureanalysis ip testprogramdevelopment digitaldesign circuitdesign powerintegrity circuitdesigning systemintegrators programdevelopment electricalengineering rtl sta lec ertms timing testing laceroute

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