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MEMORY LAYOUT ENGINEER (VLSI DOMAIN)

5.00 to 10.00 Years   Bangalore   13 Apr, 2020
Job LocationBangalore
EducationNot Mentioned
SalaryRs 10 - 20 Lakh/Yr
IndustryIT - Software
Functional AreaEmbedded, VLSI
EmploymentTypeFull-time

Job Description

1. SRAM expert first. 2. FinFET experience is required. (tsmc N16 and below) 3. detail educational background list (EE related is must) . 4. detail layout working experience list. 5. project owner/ leader is preferred. project leader means well understanding of whole project, IP level integration (ex : PLL, ADC , SRAM- Macr. Tech skills Medical Coding Chennai, Medical Coding Training in Chennai Home / Job details Memory Layout Engineer (VLSI Domain) @ BangalorePosted on : 2018- 08- 30 Experience Min 5 yrs Job City Bangalore Qualification BE/ B.Tech, ME/ M.Tech ( VLSI Domain ) Industry Type Semiconductors / Electronics Skillset SRAM, FinFET( tsmc N16 & below) , Design Layout , Memory Integration 1. SRAM expert first. 2. FinFET experience is required. (tsmc N16 and below) 3. detail educational background list (EE related is must) . 4. detail layout working experience list. 5. project owner/ leader is preferred. project leader means well understanding of whole project, IP level integration (ex : PLL, ADC , SRAM- Macro/ SRAM- compiler owner.) CTC : 10 - 20L P.A(no constraints),

Keyskills :
functional medical training integration basic auditing sram resume design 3d edicalcoding equipmentdesign workingexperience

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