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Princ Eng Design Enablement/Analog RF Design

0.00 to 3.00 Years   Bangalore   22 May, 2020
GLOBALFOUNDRIES
Job LocationBangalore
EducationNot Mentioned
SalaryNot Disclosed
IndustryManufacturing
Functional AreaService / Installation / Repair
EmploymentTypeFull-time

Job Description

Analog IP: PLL, BG, LDO, OpAmps etc.Power Management IP: Low Voltage and High Voltage LDO, BG, DC-DC Buck, DC-DC Boost, DC-DC Buck-Boost, and Charge Pumps etc.Part B: Essential Responsibilities Include:Analog IP: PLL, BG, LDO, OpAmps etc.Power Management IP: Low Voltage and High Voltage LDO, BG, DC-DC Buck, DC-DC Boost, DC-DC Buck-Boost, and Charge Pumps etc.The responsibility includes complete understanding of circuit topologies, best class architecture development, Design from Specifications, Sub-Block circuit design, layout or guidance to layout effort and review etc.Part C: Please complete the following Objectives Questionnaire:You will work directly with existing team working on circuit architecture development from spec, IP-Level/Block-Level Circuit Design, Simulations, Results Documentation for review, PDK assessment with IP, Layout Design and Layout verification. The assignment would involve getting exposure to leading edge foundry EDA tools, design flows, and yield / design interaction., *Required Qualifications:

  • MSEE or PhD from an accredited program on Electronics Engineering, VLSI Design, Microelectronics with focus on the mentioned circuits.
  • MS/MTech (4-5) yearsPhD (0-3) years
  • Minimum of 3 months experience with UNIX environment.
  • Excellent academic standing.
  • Attention to detail and Learning skills
  • Self-motivated; able to take ownership of assignments, develop work plans and proactively seek feedback to ensure objectives are aligned and met.
  • Strong written and oral communications skills.
  • Team player; able to succeed in a dynamic, fast paced environment.
Preferred Qualifications:
  • PhD/M.Tech Student from reputed academic Institutes in India (Ex: IITs or NITs or BITs))
  • VLSI design courses / experience with any domain listed above in Part B.
  • Familiarity with CADENCE/SYNOPSYS design system.

Keyskills :
edatools vlsidesign highvoltage layoutdesign circuitdesign powermanagement electronicsengineering architecturedevelopment ip eda ldo pdk vlsi unix edge pumps boost yield design cdc

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