Recruiting for MTS Silicon Design Engineer

Job Description

What you do at AMD changes everythingAt AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies building blocks for gaming, immersive platforms, and the data center.Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the extra mile to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, we invite you to take a look at the opportunities available to come join our team. THE ROLE (SOC Verif Manager/Lead):
• Drive SOC verification specialized in power management execution after having co-ordination with SOC (Design, DFT, PD), System and SW engineering teams.
• Work with customer on feature requirements, use case scenarios, test plan reviews to realize the SOC is meeting all functional aspects of the targeted domain.
• Work with architecture and design team on high level arch and use case scenarios and config space.
• Work with IP team for IP requirement and deliverables.
• Work with vendors and ODC members for the successful project execution
• Work with program management team for SOC planning, schedule, resource demand/supply, critical path analysis, dev cost and execution.
• Work with post-Si team to drive Si bring up and ramp to productization.
KEY RESPONSIBILITIES:
• Driving IP verification from feature extraction to tape-out and productization by validating through SOC.
• Adapt the Design changes, Verification Architect, Test-plan creation, Power Reduction, Timing Convergence, test bench and test plan reviews & tape-outs.
• Running regular execution meetings, scrums, standing meetings and resolving bottlenecks.
• Project planning including schedule, deliverables, risk, and mitigations options.
• Drive the team for the bug free silicon deliverable
PREFERRED EXPERIENCE:
• Experience of successfully leading minimum 2 SOC execution from spec to tape-out. And lead the IP verification for multiple IPs of various complexity.
• Low power verification, Poweraware verification, Power management is the key focus area.
• Expertise in IP, Subsystem and SOC Verification -with specialization in Power management, Power Convergence etc.
• Work with a team of Architects, Hardware and Software engineers to Define the product use case scenarios.
• Strong hands-on experience in different SOC Verification activities, System Verilog, uVM, C++, HW/SW co-verification, Test plan review, Debug/triage, Coverage, bottleneck resolution, Strong Problem Solving, Automation and Debugging Skills
• Comfort with Scripting such as Ruby, Perl, Shell, Python and TCL is a plus
• Comfortable with design/verification tools and flows like VCS, Verdi, SOC Connectivity, SV assertions, HW-SW co-simulations, UPF/CPF flows etc.
• Expertise in architecture understanding, System bus protocol understanding (e.g., AXI, PCIe, DDR, memory etc.)
• Strong understanding of System integration, make file flow, Verification Methodologies, Boot up sequence.
• Expertise in managing execution team, project planning, IP delivery timelines, deliverables and quality checks, Resource planning, critical path analysis, risks, and mitigation plan.
• JIRA based project management is a plus.
ACADEMIC CREDENTIALS:
• BE/B.Tech/ME/MTECH/MS or equivalent in ECE/EEE
• ~10-18 years of strong experience in IP, Sub System & SOC Verification & leading complete SOC verification team.
#LI-SB1 Requisition Number: 161724 Country/Region/Location: India State/Province: Karnataka City: Bangalore Job Function: DesignApply nowApply nowApply for JobEnter your email to apply,

Keyskills :
drawingdraftingautocaduse casesystem verilogmodeling