Senior pre-silicon verification engineer automation

Job Description

JSenior pre-silicon verification engineer Job DescriptionWe are seeking highly motivated, energetic, team-oriented engineer willing to take the challenge of delivering Pre-Silicon validation of industry leading IPs that are developed in Ethernet Product Group in Intel. In this position, You will participate in the verification of various IPs for various process technologies. You will focus on executing to pre-Silicon validation plans as per the IP/product release schedule and deliverables, and also carry out debug, report failures, report potential failures and help with root-causing the failures. You will be required to create verification test plans, drive/participate in discussions across various disciplines to get a clear understanding of requirements, develop the architecture and design of the verification environment in UVM for pre-silicon RTL verification, develops/run/debug tests in System Verilog, mentors other engineers in using the verification infrastructure and creating test benches. You may work on verification of block/IP level testing, participate in functional coverage, code coverage reviews and implement feedback. You should be able to support debugs on sub-system/SOC that use the IP provided. You should also be able to support post-silicon/platform failures related to the IP provided. You should be able to achieve goals in timely fashion, bring out pointers to management on issues and roadblocks on a timely basis and be able to work with teams across different geographies.Qualifications You should possess a Masters or Bachelors degree in Electrical/Electronics/Computer Engineering, with 3+ years of relevant experience in the industry. Additional qualifications/skills include: Experience in developing high quality validation plans, collecting and analyzing the test results and being able to debug the failures Strong problem-solving and teamwork skills, and strong verbal and written communication skills Ability to produce results in a challenging, fast-paced environment Good working knowledge of System Verilog is a must. Good working knowledge of either one or more of reuse methodologies like VMM/OVM/eRM/AVM/RVM, preferably UVM. Knowledge in eRM will be bonus. Work experience with at least one other verification aspect like Performance modeling, Formal verification etc. would be an added advantage. Familiar in scripting languages and utilities like Make, Perl, Python, etc. Experience in IP design verification with protocols such as Ethernet, PCI-Express, USB, etc. and AMBA, JTAG, etc. is desiredInside this Business Group The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. Its leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers.Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.Legal Disclaimer:Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at www.jobs.intel.com and not fall prey to unscrupulous elements.INExperienced HireJRhidden_mobileBangaloreNetwork and Edge Group,

Keyskills :
verificationuvmdesignfailure analysiscode coveragesystem verilogproblem solving