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| Job Location | Bangalore |
| Education | Not Mentioned |
| Salary | Not Disclosed |
| Industry | Manufacturing |
| Functional Area | General / Other Software |
| EmploymentType | Full-time |
An experienced DFT engineer responsible for executing advanced DFT/DFD/DFM (design for test/debug/manufacturability) techniques for developing innovative products for Automotive.The candidate selected will also be involved in all aspects of DFT including methodology development, design, pattern development, manufacturing tests and debug.The job parameter includes: DFT RTL coding and integration SCAN and Logic-BIST insertion High Speed interfaceDFT management Memory BIST specification and insertion Interaction with Front End, Back End &Test Engineers located at various sites, Strong teamwork and communication and quick learning are key skillsGood RTL (VHDL or Verilog) writing skills SOC integration and RTL modification as per DFT requirement Good at DFT DRC/Linting/Spyglass checks Hands on experience with JTAG protocols, Scan and MBIST architectures and tools (SMS, MMB)Working Knowledge in scripting language (TCL, Perl, MASIS etc) and latest technique viz. Lowpower ATPG, Analog Bist, Logic Bist will be preferredExpertise to use industry standard tools like Tetramax, Design Compiler, etc.Expertise in RTL, Gate-level simulations and debug, including silicon-debugWorking Knowledge of Boundary Scan Testing and testing of IPs viz ADC, FLASH , PMU in standalone mode.Expert leader in ATPG coverage analysis to achieve high test coverage at SoC level. PT2TMAX flow for ATPG STA is desirable
Keyskills :
atpgdftscancoresiliconcontinuous improvement facilitationfront endrtl codinglogic bistboundary scantest coveragewriting skillsdesign compilerpattern developmentsocrtlstaadcpmuips