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Sr Eng Design Enablement/IC Package Design

0.00 to 3.00 Years   Bangalore   25 May, 2020
Job LocationBangalore
EducationNot Mentioned
SalaryNot Disclosed
IndustryManufacturing
Functional AreaEmbedded / System SoftwareGeneral / Other Software
EmploymentTypeFull-time

Job Description

*Global Foundries (GF) Bangalore is seeking a highly skilled and motivated packaging/PCB development engineer for full time position . The work entails working with RF/mmWave IC designers to co-develop IC with packaging of choice including wire-bond such as QFNs, and flip-chip such as ceramic based packaging.Part B: Essential Responsibilities Include:

  • Ensure the IC design/process can be manufactured with the given package for mechanical and electrical integrity.
  • Account for the packaging physical and electrical properties to include with the silicon for co-simulation of the two to ensure circuit targets are maintained. This includes design of passive matching circuitry as part of the package such as inductors or transformers when applicable (RDL). As such, having a background in RF/mmWave circuit functions is required: Low Noise Amplifiers, Power Amplifiers.
  • Design PCB test boards to interface with the packaging
  • Experience in Patch antenna design is a plus
  • The responsibility includes complete understanding of circuit topologies, best class architecture development, Design from Specifications, Sub-Block circuit design, layout or guidance to layout effort and review etc.
Part C: Please complete the following Objectives Questionnaire:You will work directly with existing team working on circuit architecture development from spec, IP-Level/Block-Level Circuit Design, Simulations, Results Documentation for review, PDK assessment with IP, Layout Design and Layout verification. The assignment would involve getting exposure to leading edge foundry EDA tools, design flows, and yield / design interaction., *Required Qualifications:
  • MSEE or PhD from an accredited program on Electronics Engineering, Microelectronics with focus on the mentioned circuits.
  • Minimum of 3 months experience with UNIX environment.
  • Excellent academic standing.
  • Attention to detail and Learning skills
  • Self-motivated; able to take ownership of assignments, develop work plans and proactively seek feedback to ensure objectives are aligned and met.
  • Strong written and oral communications skills.
  • Team player; able to succeed in a dynamic, fast paced environment.
Preferred Qualifications:
  • PhD/M.Tech Student from reputed academic Institutes in India (Ex: IITs or NITs or BITs))
  • Experience with any domain listed above in Part B.
  • Familiarity with Cadence based packaging and Cadence,PADS PCB design system tools.

Keyskills :
edatools pcbdesign layoutdesign circuitdesign electronicsengineering architecturedevelopment ip pcb eda pdk unix edge pads yield design foundry antenna circuit silicon adence

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