hireejobs
Hyderabad Jobs
Banglore Jobs
Chennai Jobs
Delhi Jobs
Ahmedabad Jobs
Mumbai Jobs
Pune Jobs
Vijayawada Jobs
Gurgaon Jobs
Noida Jobs
Oil & Gas Jobs
Banking Jobs
Construction Jobs
Top Management Jobs
IT - Software Jobs
Medical Healthcare Jobs
Purchase / Logistics Jobs
Sales
Ajax Jobs
Designing Jobs
ASP .NET Jobs
Java Jobs
MySQL Jobs
Sap hr Jobs
Software Testing Jobs
Html Jobs
IT Jobs
Logistics Jobs
Customer Service Jobs
Airport Jobs
Banking Jobs
Driver Jobs
Part Time Jobs
Civil Engineering Jobs
Accountant Jobs
Safety Officer Jobs
Nursing Jobs
Civil Engineering Jobs
Hospitality Jobs
Part Time Jobs
Security Jobs
Finance Jobs
Marketing Jobs
Shipping Jobs
Real Estate Jobs
Telecom Jobs

Sr Verification IC Engineer

3.00 to 8.00 Years   Bangalore   01 Sep, 2022
Job LocationBangalore
EducationNot Mentioned
SalaryNot Disclosed
IndustryRecruitment Services
Functional AreaGeneral / Other Software
EmploymentTypeFull-time

Job Description

    Sr Verification IC EngineerThe Role:The Verification Engineer will define verification architecture, implement verification environment for block level, SoC subsystems and SOC top level design that use advance verification methodologies and meet established content, performance, quality, cost and schedule goals. He/She will also be responsible for the mixed-signal simulations of the SOCThe key responsibilities of a Verification engineer comprise:
    • Define overall verification strategies, methodologies, and simulation environment
    • Work with RTL designers, system architects and block level verification engineers to develop top level verification requirements and test plans based on specifications.
    • Develop, maintain and publish verification specifications.
    • Analyze and debug simulation failures
    • Generates code coverage and functional coverage report
    • Run gate level simulation and debug them.
    • Perform the constraint assertion-based verification
    Required Qualifications and Skills:
    • BS in EE with 3+ years of experience or MS in EE with 1+ year experience
    • Strong knowledge with ASIC Simulation Tool & Verification Language: all sign-off simulators, Verdi/Siloti
    • Fluent in verification language such as UVM/OVM/System Verilog, Vera, Verilog
    • Experience in writing Test-plans and creating directed and random test cases
    • Strong scripting skills in Perl, Python, Linux shells etc.

Keyskills :
uvmpythonsocperl

Sr Verification IC Engineer Related Jobs

© 2019 Hireejobs All Rights Reserved