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ASIC RTL Design Engineer, Silicon

2.00 to 5.00 Years   Bengaluru/ Bangalore (Karnataka)   18 May, 2025
Google India Pvt Ltd
Job LocationBengaluru/ Bangalore (Karnataka)
EducationBE/ B.Tech (Engineering)
SalaryAs per Industry Standards
IndustryInternet/Dot com/ISP
Functional AreaHR/PM/IR/Training
EmploymentTypeFull-time

Job Description

: ASIC RTL Design EngineerLocation: Bengaluru, Karnataka, IndiaLevel: MidExperience: Driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area.Minimum qualifications:

  • Bachelors degree in Electrical/Computer Engineering or equivalent practical experience.
  • 2 years of experience with RTL design using Verilog/System Verilog and microarchitecture.
  • Experience in ARM-based SoCs, interconnects and ASIC methodology.
Preferred qualifications:
  • Masters degree in Electrical/Computer Engineering.
  • Experience with methodologies for RTL quality checks (e.g., Lint, CDC, RDC).
  • Experience with methodologies for low power estimation, timing closure, synthesis.
About the jobBe part of a team that pushes boundaries, developing custom silicon solutions that power the future of Googles direct-to-consumer products. Youll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.As part of our platform IP team, you will be a part of a team that designs foundation and chassis IPs (NoC, Clock, Debug, IPC, MMU and other peripherals) for Pixel SoCs. You will collaborate with members of architecture, software, verification, power, timing, synthesis, etc. to specify and deliver quality RTL. You will solve technical problems with innovative micro-architecture, low power design methodology, and evaluate design options with complexity, performance, and power.Googles mission is to organize the worlds information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make peoples lives better through technology.Responsibilities
  • Define microarchitecture details such as interface protocol, block diagram, data flow, pipelines, etc.
  • Perform RTL development (SystemVerilog), debug functional/performance simulations.
  • Perform RTL quality checks including Lint, CDC, Synthesis, UPF checks.
  • Participate in synthesis, timing/power estimation, and FPGA/silicon bring-up.
  • Communicate and work with multi-disciplined and multi-site teams.
Information collected and processed as part of your Google Careers profile, and any job applications you choose to submit is subject to Googles Applicant and Candidate Privacy Policy.Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Googles EEO Policy, Know your rights: workplace discrimination is illegal, Belonging at Google, and How we hire.If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form.Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.To all recruitment agencies: Google does not accept agency resumes. Please do not forward resumes to our jobs alias, Google employees, or any other organization location. Google is not responsible for any fees related to unsolicited resumes.

Keyskills :
rtl design expertise verilog/systemverilog proficiency arm socs knowledgelow power methodologies timing closure techniques job posting recruitment workforce communication

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