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Verification Engineer

3.00 to 6.00 Years   Delhi   15 Aug, 2020
Job LocationDelhi
EducationNot Mentioned
SalaryNot Disclosed
IndustryIT - Hardware / Networking
Functional AreaGeneral / Other Software,Testing
EmploymentTypeFull-time

Job Description

The Verification Engineer is required to work closely with Ceragon VLSI group in designing and developing chips, participating in emerging talented group. The job offers the opportunity to verify complex devices from initial stages of development and design over AISC or FPGA platforms. It also offers exposure to definition of silicon making methodologies from architecture towards release to production, working closely with a dynamic and motivated team. Verification Engineer responsibilities:

  • Develop verification Environment for various platforms FPGA or ASIC. Implementing under top notch methodologies.
  • Responsible for Various IPs (PHY, Networking IPs etc) and SOC Verification
  • Defining Test plans, coverage plans etc
  • Working closely with Ceragon system team ensuring correct implementation wrt the Ceragon FibAir products requirements
Job Requirements The ideal candidate has the following:Must:
  • Preferred university background AutomaticsComputers, Electrical Engineering.
  • At least 3 years experience with Specman or System Verilog based verification ( specman is preferred ).
  • In depth understanding of overall verification methodologies.
  • Background in Networking IPs and SOC architecture.
  • Understanding of verification and design practices.
Advantage:
    • Experience with RISC processors.
    • Experience with C coding.
    • Verilog.
    ,

    Keyskills :
    uvmdesignsystem verilogsoc verification

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