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Responsible for Co- simulation of mix signal IPs of SERDES and Memory PHY. Designing behavioral models of mixed signal designs for use in functional verification. Developing a generic modeling fra...
systemverilog dsp ips uvm serdes hspice verilog spectre protocols simulation engineering architecture presentation communication ixedsignal commercialmodels kingexperience spice ertmsLayout in advanced CMOS technologies including floorplan, placement, routing, DRC, LVS etc. Should have worked on 16nm and below technology nodes on various analog mixed signal blocks such as PLL, Ba...
phpsocdrcdaclvsadcicchtmlcmosmysqldesignserdesroutingixedsignalgapertmscircuitplacementIn this role as Logic Micro-Architect in Intels Mixed Signal IP Group, you will be responsible for the below items focusing mainly on logic design aspects of an IP/Subsystem/SoC design & development. ...
iodesignphysicaldesignarchitecturaldesigndesignserdessiliconvalidationarchitecturedocumentationSerDesixedsignallogicdesignertmstimingbusinessspecificationsHighSpeedInterfacesDDR3Layout in advanced CMOS technologies including floorplan, placement, routing, DRC, LVS etc. Should have worked on 16nm and below technology nodes on various analog mixed signal blocks such as PLL, Ba...
phpsocdrcdaclvsadcicchtmlcmosmysqldesignserdesroutingixedsignalgapertmscircuitplacementRoles and responsibilities The candidate will be involved in any of the following activities:
3-10 years Experience Emulator experience -Zebu preferred nIntegration of transactors to emulation testbench nScripting knowledge (Tasks such as writing trackers, scripting, automation like porting si...
ethernetixedsignalanaloglayoutanalyticalskillscommercialmodels3-5 years Experience in Physical Design implementation - Responsible to independently handle the execution and delivery of a medium to complex full chip/blocks RTL2GDS implementation- Played a signifi...
statictiminganalysisphysicaldesigntiminganalysisphysicalverificationdesignixedsignalanaloglayouttimingclosureteammentingpowerestimationtiming4. Member Technical Staff - SerDes Design and Verification Job Description The job function demands for the deep understanding on the protocols like USB, PCIE, MIPI, JEDEC, I2C, SPI etc. Design/ ver...
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