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ENGR SR, DESIGN_TL

0.00 to 4.00 Years   Chennai, Hyderabad, Kolkata   25 Jul, 2022
ON Semiconductor Technology India Private Limited
Job LocationChennai, Hyderabad, Kolkata
EducationNot Mentioned
SalaryNot Disclosed
IndustryConsumer Durables / Electronics
Functional AreaGeneral / Other Software
EmploymentTypeFull-time

Job Description

    * Job Description The ASIC design engineer will be responsible for RTL design and ASIC implementation of Access Point and Client WiFi chipsets for the QCS Wireless division of Onsemi. Responsibilities
    • RTL design of digital logic blocks and debugging.
    • Support DV team to debug the digital design.
    • Run front-end tools like LINT, CDC, AutoCheck and debug.
    • Support backend team for STA.
    • Run Synthesis and ensure design meets timing requirements.
    • Top and block level integration of the chip.
    • Support DFT.
    • Low power design and development.
    , * Desired Skills and Qualifications
    • Minimum BS degree in EE Engineering with 1-5 years of relevant experience, or an MS in EE related fields with 0-5 years of experience.
    • Sound knowledge of EE concepts.
    • Exposure to embedded processor integration.
    • Sound knowledge of ASIC Design with keen understanding on Performance/Area/Power trade-off.
    • Experience in ASIC implementation methodology steps like lint, CDC, Synthesis, formal verification, and STA.
    • Solid foundation in scripting with Pearl, Python, coding experience in C and exposure to shell scripting.
    • Experience with Verilog and System Verilog for RTL design or basic verification.
    • Experience of silicon bring-up, hardware validation and silicon debug is a plus.
    • Excellent communication skills both written and verbal.
    • Excellent collaboration skills.
    • Knowledge of 802.11 or Ethernet 802.3 protocols is a plus.

Keyskills :
front endrtl designasic designsystem verilogcoding experienceformal verificationcommunication skillsimplementation methodologyrtlcdcwifilintbasicpearlstepspythondesign

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