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1.Position-2ND LINE -RSM-Diabeto Area of coverage-Entire Kerala HQ-Cochin CTC -10LACS Experience-2nd line experience or ...
salesmarketingbusiness developmentretailtargetphymailorthocardioBasebandOFDMAEqualizationInterference CancellationMAC layerChannel EstimationUWBChannel CodingParcelsScanOrthogonal FrequencyDivision Multiplexing1.Position-2ND LINE -RSM-Diabeto Area of coverage-Entire Kerala HQ-Cochin CTC -10LACS Experience-2nd line experience or ...
salesmarketingbusiness developmentretailtargetphymailorthocardioBasebandOFDMAEqualizationInterference CancellationMAC layerChannel EstimationUWBChannel CodingParcelsScanOrthogonal FrequencyDivision MultiplexingSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layerchannel codingchannel estimationinterference cancellationestimationequalizationmultiplexingSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layerchannel codingchannel estimationinterference cancellationestimationequalizationmultiplexingSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layerchannel codingchannel estimationinterference cancellationestimationequalizationmultiplexingSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layerchannel codingchannel estimationinterference cancellationestimationequalizationmultiplexingSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layerchannel codingchannel estimationinterference cancellationestimationequalizationmultiplexingSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layerchannel codingchannel estimationinterference cancellationestimationequalizationmultiplexingSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layerchannel codingchannel estimationinterference cancellationestimationequalizationmultiplexing
EMBEDDED DEVELOPER - Audio Wafer Space is looking for developers for embedded audio projects. Desired Skills and Experience - 4+ year hands -on experience in requirements analysis, design, softwa...
embedded cpicarmembedded systemsmicrocontrollersoftware development life cyclelife cyclepost processingsoftware developmentrequirements analysisproject administrationautomotive infotainmentconfiguration manaVLSI design engineer that will join Ceragon Digital Solution group will be:
Position Description:
To be part of a highly skilled and challenging high speed PHY design team working on the latest technology nodes (12nm and below).
Take ownership of analog sub- blocks ...
Skill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layerchannel codingchannel estimationinterference cancellationestimationequalizationmultiplexingSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layerchannel codingchannel estimationinterference cancellationestimationequalizationmultiplexingSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layerchannel codingchannel estimationinterference cancellationestimationequalizationmultiplexingSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layerchannel codingchannel estimationinterference cancellationestimationequalizationmultiplexingSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layerchannel codingchannel estimationinterference cancellationestimationequalizationmultiplexingSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layerchannel codingchannel estimationinterference cancellationestimationequalizationmultiplexingSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layerchannel codingchannel estimationinterference cancellationestimationequalizationmultiplexingEMBEDDED DEVELOPER - Audio Wafer Space is looking for developers for embedded audio projects. Desired Skills and Experience - 4+ year hands -on experience in requirements analysis, design, softwa...
embedded cpicarmembedded systemsmicrocontrollersoftware development life cyclelife cyclepost processingsoftware developmentrequirements analysisproject administrationautomotive infotainmentconfiguration manaResponsibilities: To handle full set of air import/export operation documents To follow up shipment status To monitor airline bookings and procedures Handle daily operation related enquiries and c...
ciscorouterstroubleshootingnetworkingswitchesnew business opportunitiesnew businesscreative salesfreight forwardingfinancial accountingclient presentationsmapsetsalescargosalaryoffersfreightbusiness
Roles and Responsibilities
Assisting the EHS Manager in the following daily EHS operational activities at USP India site and other locations identified from time to time; ...
inspectionoperational activities safetywaste sitesafety audit operations managementsafety training
Skill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layer channel codingchannel estimation interference cancellationestimation equalizationmultipleSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layer channel codingchannel estimation interference cancellationestimation equalizationmultipleSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layer channel codingchannel estimation interference cancellationestimation equalizationmultipleSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layer channel codingchannel estimation interference cancellationestimation equalizationmultipleSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layer channel codingchannel estimation interference cancellationestimation equalizationmultipleSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layer channel codingchannel estimation interference cancellationestimation equalizationmultipleSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layer channel codingchannel estimation interference cancellationestimation equalizationmultipleSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layer channel codingchannel estimation interference cancellationestimation equalizationmultipleEMBEDDED DEVELOPER - Audio Wafer Space is looking for developers for embedded audio projects. Desired Skills and Experience - 4+ year hands -on experience in requirements analysis, design, softwa...
embeddedc pic arm embeddedsystems microcontroller softwaredevelopmentlifecycle lifecycle postprocessing softwaredevelopment requirementsanalysis projectadministration automotiveinfotainment onfigurationmana Position Description:
To be part of a highly skilled and challenging high speed PHY design team working on the latest technology nodes (12nm and below).
Take ownership of analog sub- blocks ...
Skill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layer channel codingchannel estimation interference cancellationestimation equalizationmultipleSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layer channel codingchannel estimation interference cancellationestimation equalizationmultipleSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layer channel codingchannel estimation interference cancellationestimation equalizationmultipleSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layer channel codingchannel estimation interference cancellationestimation equalizationmultipleSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layer channel codingchannel estimation interference cancellationestimation equalizationmultipleSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layer channel codingchannel estimation interference cancellationestimation equalizationmultipleLooking for experienced communication system designers to join our team at Hyderabad. Candidates are expected to have experience in the complete design cycle from specification, architecture, design, ...
drawingautocad draftingmodeling cadsignal processing channel estimationcommunication systemSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layer channel codingchannel estimation interference cancellationestimation equalizationmultiple
Roles and responsibilities
Prepare and review miscellaneous tax, payroll, and international assignment cost projection calculations
Prepare and Review...
salesmis accountstat bankingms office team skillstax returns tax researchtax compliancSALARY: UP TO 35K VACANCIES: 2 QUALIFICATION: Any Graduate MALE/FEMALE: Both EXPERIENCE: 3yr-5yr JOB DETAILS Sound en...
placement editing sound engineers broadband consulting audioengineering av agency soundmixing recruitment businessoperations equalization musicproduction erecordingmixing 51mixingDesign next generation radios. Allocate signal processing functions to antennas, RF electronics, FPGAs, and DSP software to implement frequency locked loops, delay locked loops, automatic gain control...
javabiomedical customer relationsrequirements digital signal processing environmental impact assessmentpower controlYou will be working on design, development and integration of L1/L2 software modules for various aspects of wireless communication systems including synchronization, equalization, beam-forming and mul...
java sql javascript sqlserver jquery wirelesscommunicationssystems physicallayer versioncontrol signalprocessing ignalgenerat collab ationtools
The individual hired into the role of Senior at Global Mobility Services would be responsible for the below:
Roles and responsibilities salesmis accountstat bankingms office team skillstax returns tax researchtax complianc
Roles and responsibilities
Prepareand review miscellaneous tax, payroll, and international assignment costprojection calculations
Prepare and Review t...
customer relationsinsurance qualitysales misms office team skillstax returns expatriate
Roles and responsibilities
Prepareand review miscellaneous tax, payroll, and international assignment costprojection calculations
Prepare and Review t...
customer relationsinsurance qualitysales misms office team skillstax returns expatriate
Roles and responsibilities
Prepare and review miscellaneous tax, payroll, and international assignment cost projection calculations
Prepare and Review...
ms officetax returns tax researchtax compliance expatriate taxemployment tax microsoft officeproject management© 2019 Hireejobs All Rights Reserved