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* Technical Specialist (Code+Data+Testing+Tools)
Skill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layerchannel codingchannel estimationinterference cancellationestimationequalizationmultiplexing* Role and Responsibilities
* Position Title : Associate - Network Engineer L3 Rank : 10-12 Years of Network security experience. Department : IT Section : Network Team Job Purpose (In a b...
linuxdata centernetwork monitoring toolsmanagementtroubleshootingwindowsssl vpncisco wirelesscore networkwindows serveripsec vpnJD Software Asset Manager Responsibilities Strategic Software Asset Management
What You ll Do
Skill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layerchannel codingchannel estimationinterference cancellationestimationequalizationmultiplexingSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layerchannel codingchannel estimationinterference cancellationestimationequalizationmultiplexingSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layerchannel codingchannel estimationinterference cancellationestimationequalizationmultiplexingSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layerchannel codingchannel estimationinterference cancellationestimationequalizationmultiplexingSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layerchannel codingchannel estimationinterference cancellationestimationequalizationmultiplexingSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layerchannel codingchannel estimationinterference cancellationestimationequalizationmultiplexingSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layerchannel codingchannel estimationinterference cancellationestimationequalizationmultiplexing
Job Description Mandatory Skills:
Since 1992, Ciena has been driven by a relentless pursuit of network innovation. We believe in a network that grows smarter, more agile, and more responsive every day. This means that when ...
linuxjenkinsgitmavenautomationoptical transport networknetwork function virtualizationserver ostest casesopen sourcetest coveragesystem testingproblem solvingIP Routing & SDN technical lead The RBC Customer Engineering team provides Engineering Services in support of real-world deployments of advanced Solutions across ...
customer relationsmake it happenobject oriented designsqlenvironmentsql serversoftware defined networkingjavaend to end deliveryjboss application serverstatements of work sowIP & Optical Networks RBC Unit Network Services Platform (NSP) Solution Architect The Regional Business Unit s Customer Engineering team provides Services in suppor...
environmentcustomer relationssalesprofessional services deliveryjavaobject oriented designsoftware defined networkingjboss application serverdata modelingdeliverymake it happenSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layerchannel codingchannel estimationinterference cancellationestimationequalizationmultiplexingSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layerchannel codingchannel estimationinterference cancellationestimationequalizationmultiplexingIP Routing & SDN technical lead The RBC Customer Engineering team provides Engineering Services in support of real-world deployments of advanced Solutions across ...
customer relationsmake it happenobject oriented designsqlenvironmentsql serversoftware defined networkingjavaend to end deliveryjboss application serverstatements of work sowWhat You ll Do In this role, you will be passionate about Cisco Optical Networking technology to support our Professional Services delivery. Should have the necessary skills to deliv...
network designtest equipmentnetwork planningservice providersnetwork managementoptical networkingconflict resolutioniossmelanwansshcdctl1osadwdmAbout Accenture: Accenture is a leading global professional services company, providing a broad range of services in strategy and consulting, interactive, technology and operations, w...
itil processteam handlingit operationsproblem solvingsenior managementproject managementintrusion detectioncommunication skillsprofessional servicesprocess documentationPreparing Advertisement & placing them in Job Portals. Searching the right candidate through the job portals & short listing their c.v. Conducting telephone and face- to- face interviews to assess c...
recruitmentrecruitinghuman resourcesinductionjoining formalitieshr policiesuser groupshead huntingfile managementembedded systemsdata warehousingweb technologiesemployee relationscampus recruitmentsystem integrationPreparing Advertisement & placing them in Job Portals. Searching the right candidate through the job portals & short listing their c.v. Conducting telephone and face- to- face interviews to assess c...
recruitmentrecruitinghuman resourcesinductionjoining formalitieshr policiesuser groupshead huntingfile managementembedded systemsdata warehousingweb technologiesemployee relationscampus recruitmentsystem integrationPreparing Advertisement & placing them in Job Portals. Searching the right candidate through the job portals & short listing their c.v. Conducting telephone and face- to- face interviews to assess c...
recruitmentrecruitinghuman resourcesinductionjoining formalitieshr policiesuser groupshead huntingfile managementembedded systemsdata warehousingweb technologiesemployee relationscampus recruitmentsystem integrationPreparing Advertisement & placing them in Job Portals. Searching the right candidate through the job portals & short listing their c.v. Conducting telephone and face- to- face interviews to assess c...
recruitmentrecruitinghuman resourcesinductionjoining formalitieshr policiesuser groupshead huntingfile managementembedded systemsdata warehousingweb technologiesemployee relationscampus recruitmentsystem integrationSince 1992, Ciena has been driven by a relentless pursuit of network innovation. We believe in a network that grows smarter, more agile, and more responsive every day. This means that when ...
optical transport networknetwork function virtualizationserver ostest casestest coveragesystem testingcarrier ethernetautomation frameworkservice provisioningintelligent networksnetwork virtualizationhardware engg in chennai Candidate must have engineering degree in Biomedical Engineering/ ECE/ EEE/ E&I/ ETC or relevant areas. Candidate must hav...
signal processingertmsmatlabcircuitsensorshardwarenetworkingbiomedicalengineeringStatistical Signal ProcessingMIMOInformation TheorySpeech ProcessingOrthogonal FrequencyDivision Multiplexing1.Position-2ND LINE -RSM-Diabeto Area of coverage-Entire Kerala HQ-Cochin CTC -10LACS Experience-2nd line experience or ...
salesmarketingbusiness developmentretailtargetphymailorthocardioBasebandOFDMAEqualizationInterference CancellationMAC layerChannel EstimationUWBChannel CodingParcelsScanOrthogonal FrequencyDivision Multiplexing1.Position-2ND LINE -RSM-Diabeto Area of coverage-Entire Kerala HQ-Cochin CTC -10LACS Experience-2nd line experience or ...
salesmarketingbusiness developmentretailtargetphymailorthocardioBasebandOFDMAEqualizationInterference CancellationMAC layerChannel EstimationUWBChannel CodingParcelsScanOrthogonal FrequencyDivision Multiplexing1.Position-2ND LINE -RSM-Diabeto Area of coverage-Entire Kerala HQ-Cochin CTC -10LACS Experience-2nd line experience or ...
salesmarketingbusiness developmentretailtargetphymailorthocardioBasebandOFDMAEqualizationInterference CancellationMAC layerChannel EstimationUWBChannel CodingParcelsScanOrthogonal FrequencyDivision MultiplexingSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layerchannel codingchannel estimationinterference cancellationestimationequalizationmultiplexingSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layerchannel codingchannel estimationinterference cancellationestimationequalizationmultiplexingSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layerchannel codingchannel estimationinterference cancellationestimationequalizationmultiplexingSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layerchannel codingchannel estimationinterference cancellationestimationequalizationmultiplexingSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
open verification methodologymac layerchannel codingchannel estimationinterference cancellationestimationequalizationmultiplexingSkill Set: PCIe / Ethernet 1G / USB3.0 Experience : 4 - 8 Years UVM and Sytem Verilog is an must skill Must have develiped UVM based environment from scratch Shall have worked on PHY verifi...
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